GitHub

microchip-pic-avr-examples/pic16f13276-quadrature-decoder-timers-mplab-mcc

This repository provides an MPLAB® X project that implements a quadrature decoder circuit using the configurable logic block (CLB) peripheral. The CLB peripheral is a collection of logic elements that ...
IEEE

Energy-Efficient Three-Valued Logic Encoder and Decoder Circuits with GNRFETs

Abstract: Three-valued logic offers potential advantages over binary logic, including faster computation, smaller chip size and reduced interconnects that leading to lower complexity, higher speed and ...
EDN

Pro Logic II matrix decoder melds multimedia

Matrix surround decoding, the process of deriving several output channels from a two-channel delivery medium, is nothing new. When Dolby Surround Pro Logic decoding was introduced back in 1987, it ...
EDN

Xilinx Meets Performance Requirements of LTE Wireless Systems With New LogiCORE Turbo Encoder and Decoder Solu

Xilinx Meets Performance Requirements of LTE Wireless Systems With New LogiCORE Turbo Encoder and Decoder SolutionsDelivers 5X throughput boost to developers of next-generation wireless systems ...
Design-Reuse

Ocean Logic releases 1080p H.264 encoder and limited decoder with 8-16:1 compressed frame store that requires no off chip DRAM

Sydney, March 28 2011 --Today Ocean Logic announces the 1080p H.264 Encoder and Limited Decoder IP Cores based on a new, patent pending, Compressed Frame Store (CFS) technology whose main features are ...
Design-Reuse

Ultra HD H.264 Video Codec IP solution on Zynq FPGA

Numerous industries in broadcast, cable, videoconferencing and consumer electronics space are using H.264 as the video codec of choice for their products and services. The H.264/AVC video coding ...