GitHub

FPGA Telemetry Communication System — Convolutional Coding + Viterbi Decoding

This project implements and validates a hardware-based digital telemetry system using FPGA-synthesizable Verilog modules for convolutional encoding and Viterbi decoding. Telemetry systems — such as ...
IEEE

A configurable and low complexity hard-decision viterbi decoder in VLSI architecture

Abstract: Convolutional encoding and viterbi algorithm are basic concepts of error correction method. Specifically, viterbi algorithm is one of decoding method for ...
IEEE

Efficient implementation of Convolution Encoder and Viterbi Decoder

Abstract: This paper describes about the Convolution Encoder and Viterbi Decoder algorithm. The main aim is to achieve encoding and decoding rate as per WiMAX standard. Here, Convolution Encoder and ...
GitHub

fujiyama-kota-comm/fec-nsc-codec

A clean and modular C implementation of Non-Systematic Convolutional (NSC) Codes with both soft-decision (LLR) and hard-decision Viterbi decoding. Includes a branchless trellis-driven encoder/decoder ...
Design-Reuse

Implementing the Viterbi Algorithm in Today's Digital Communications Systems

With the consumer demand for increased content and as a result, increasing high data bandwidth continuing to drive communications systems, coding for error control ...
Design-Reuse

Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding

This paper describes an ASIP decoder template suitable for multi-standard Viterbi, Turbo and LDPC decoding. We show architecture fitness for WLAN, WiMAX and 3GPPLTE standards, although various other ...
TechRepublic

Performance Analysis of Viterbi Decoder using different Digital Modulation Techniques in ...

In this proposed paper, a simulation of convolutional encoder and Viterbi decoder presented. This paper focuses on the performance study of Viterbi algorithm by varying parameters like constraint ...