I’m really glad to share that, this is my fifth project on Cadence Virtuoso. I am designing here a 2-input CMOS XOR Gate Design by 4 CMOS NAND Gate, with it's Layout using Cadence Virtuoso. CMOS XOR ...

This repository presents the design of Two Input NAND Gate implemented using Synopsis Custom Compiler. The purpose of this Hackathon is to implement the proposed design in 28 nm PDK (Process Design ...

Abstract: Full Adder is one of the fastest adder used in the complex data processing to perform fast arithmetic operations. The main aim of this paper is a design of 2T XOR gate based full adder using ...